1. Field of the Invention
The disclosure relates generally to methods and devices for power management, and more particularly, relates to methods and devices for power management of a multi-core memory.
2. Description of the Related Art
With technological development and chip architecture design evolution, processors with duo-core, quad-core, and even multi-core are becoming more common and popular nowadays. However, when the memory of a multi-core processor is shared, the processing speed depends on the transmission speed of the data bus between the processor and the memory. To break through this bottleneck, the memory is designed as a multi-core memory, such that each core of the multi-core processor corresponds with an independent memory to maintain performance. However, for multi-core memories, power management is a challenge.